PIC18F14K50-I/SO【PDF 33/285 页】IC PIC MCU FLASH 8KX16 20-SOIC

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Sheet目录3871

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PIC18F/LF1XK50

DS41350E-page 128

Preliminary

2010 Microchip Technology Inc.

FIGURE 14-11:

EXAMPLE OF PWM DIRECTION CHANGE AT NEAR 100% DUTY CYCLE

14.4.3

START-UP CONSIDERATIONS

When any PWM mode is used, the application

hardware must use the proper external pull-up and/or

pull-down resistors on the PWM output pins.

The CCP1M<1:0> bits of the CCP1CON register allow

the user to choose whether the PWM output signals are

active-high or active-low for each pair of PWM output pins

(P1A/P1C and P1B/P1D). The PWM output polarities

must be selected before the PWM pin output drivers are

enabled. Changing the polarity configuration while the

PWM pin output drivers are enable is not recommended

since it may result in damage to the application circuits.

The P1A, P1B, P1C and P1D output latches may not be

in the proper states when the PWM module is

initialized. Enabling the PWM pin output drivers at the

same time as the Enhanced PWM modes may cause

damage to the application circuit. The Enhanced PWM

modes must be enabled in the proper Output mode and

complete a full PWM cycle before enabling the PWM

pin output drivers. The completion of a full PWM cycle

is indicated by the TMR2IF bit of the PIR1 register

being set as the second PWM period begins.

Forward Period

Reverse Period

P1A

TON

TOFF

T = TOFF – TON

P1B

P1C

P1D

External Switch D

Potential

Shoot-Through Current

Note 1:

All signals are shown as active-high.

TON is the turn on delay of power switch QC and its driver.

TOFF is the turn off delay of power switch QD and its driver.

External Switch C

Note:

When the microcontroller is released from

Reset, all of the I/O pins are in the

high-impedance state. The external cir-

cuits must keep the power switch devices

in the Off state until the microcontroller

drives the I/O pins with the proper signal

levels or activates the PWM output(s).

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